Pinned

1. fusesoc

   Package manager and build abstraction tool for FPGA/ASIC development

   Python 520 127

2. serv

   SERV - The SErial RISC-V CPU

   Verilog 236 36

3. edalize

   An abstraction library for interfacing EDA tools

   Python 189 56

4. fusesoc/fusesoc-cores

   FuseSoC standard core library

   Verilog 28 10

5. chipsalliance/Cores-SweRVolf

   FuseSoC-based SoC for SweRV EH1

   Coq 51 12

6. fusesoc/fusesoc-generators

   A collection of core generators to use with FuseSoC

   Python 4 4