SymbiFlow
Open source flow for generating bitstreams from Verilog.
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Pinned repositories
Repositories
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symbiflow-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
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sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
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vtr-verilog-to-routing
Forked from verilog-to-routing/vtr-verilog-to-routingSymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
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nix-symbiflow
Forked from HackerFoo/nix-symbiflowNix packages for SymbiFlow projects and dependencies
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conda-packages
Forked from litex-hub/litex-conda-packagesConda build recipes for the toolchains needed by LiteX / MiSoC firmware
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prjxray
Documenting the Xilinx 7-series bit-stream format.
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fpga-tool-perf
FPGA tool performance profiling
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make-env
Repository containing common Makefiles for setting up conda environments.
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symbiflow-rr-graph
Collection of Routing Resources Graph (RR Graph) libraries for VPR
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prjxray-db
Project X-Ray Database: XC7 Series
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vtr-verilog-to-routing-kokoro
Kokoro Configuration to run against SymbiFlow/vtr-verilog-to-routing repository.
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yosys-symbiflow-plugins
Plugins for Yosys developed as part of the SymbiFlow project.
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symbiflow-tools-data-manager
Python based package manager to get packages and artifacts of symbiflow projects
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sphinx_symbiflow_theme
Forked from myyasuda/sphinx_materialdesign_themeMaterial Design Html Theme for Sphinx customized for SymbiFlow and related hardware projects.
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python-symbiflow-v2x
Tool for converting specialized annotated Verilog models into XML needed for Verilog to Routing flow.
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FPGA-Tool-Performance-Visualization-Library
Forked from TypingKoala/FPGA-Tool-Performance-Visualization-LibraryFTPVL is a library for simplifying the data collection and visualization process for Symbiflow development.
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symbiflow-xc-fasm2bels
Library to convert a FASM file into BELs importable into Vivado.
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sigrok-cli
Forked from sigrokproject/sigrok-cliRead-only mirror of the official repo at git://sigrok.org/sigrok-cli. Pull requests welcome. Please file bugreports at sigrok.org/bugzilla.
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python-fpga-interchange
Python interface to FPGA interchange format
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SymbiYosys
Forked from YosysHQ/SymbiYosysSymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
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python-sdf-timing
Python library for working Standard Delay Format (SDF) Timing Annotation files.
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symbiflow-examples
Example designs showing different ways to use SymbiFlow toolchains.

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