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The cache's write policy determines how it handles writes to memory locations that are currently being held in cache.
Generally only the Data Cache is involved, because usually the instructions are not self-modifying, and in the case of code self-modifying, the software may force the CPU to store this code only in MM without to involveinvolving the cache (see for instance [[AMD64]] ''Self-Modifying Code''<ref name="AMD642">Architecture Programmer's Manual "3.9.4 Cache Operation" – http://developer.amd.com/wordpress/media/2012/10/24593_APM_v21.pdf</ref>).
There are two basic policiespolicy types:
:* Write Through
==== Write through ====
* Data is written at the same time both into cache and into MM, or into cache and then into memory (from whichhence the name).
==== Write-back (or copy back) ====
* Data is updated only in cache. The data is "written back" into MM when needed, for instance in case ofon cache line replacement (overwrite) or when required by other caches. This reducereduces bus and memory traffic because the next cache line updatingupdate areis taken only in cache without involving the memory. The bit "'''D'''" or "'''M'''" – (Dirty or Modified) is set on in cache ''Directory'' (see below [[#Cache states|Cache states]]).
In case of miss on write there are two different solutions:
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