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MCST R1000 FPGA prototype
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General information | |
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Launched | 2010; 14 years ago (2010)[1] |
Designed by | MCST |
Common manufacturer | |
Performance | |
Max. CPU clock rate | 750 MHz to 1 GHz |
FSB speeds | 2 Gbps |
Cache | |
L1 cache | 48KB |
L2 cache | 2MB |
Architecture and classification | |
Application | Embedded |
Technology node | 100 mm² |
Instruction set | SPARC V9 |
Physical specifications | |
Cores |
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Package | |
History | |
Predecessor | MCST-R500S |
Successor | MCST-R2000 |
The MCST R1000 (Russian: МЦСТ R1000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC.[2]
During development this microprocessor was designated as MCST-4R.[1]
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Manufacturer |
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MCST |
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ELVEES |
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NIISI |
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NTC Module |
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Multiclet |
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Baikal Electronics |
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