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Contents

   



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1 Symbols  





2 Logic  





3 Hardware design and pinout  





4 Functional completeness  





5 See also  





6 References  





7 External links  














NAND gate






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From Wikipedia, the free encyclopedia
 

(Redirected from Negated AND gate)

NAND gate truth table
Input Output
A B A NAND B
0 0 1
0 1 1
1 0 1
1 1 0

Indigital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A NAND gate is made using transistors and junction diodes. By De Morgan's laws, a two-input NAND gate's logic may be expressed as , making a NAND gate equivalent to inverters followed by an OR gate.

The NAND gate is significant because any Boolean function can be implemented by using a combination of NAND gates. This property is called "functional completeness". It shares this property with the NOR gate. Digital systems employing certain logic circuits take advantage of NAND's functional completeness.

NAND gates with two or more inputs are available as integrated circuitsintransistor-transistor logic, CMOS, and other logic families.

Symbols[edit]

There are three symbols for NAND gates: the MIL/ANSI symbol, the IEC symbol and the deprecated DIN symbol sometimes found on old schematics. The ANSI symbol for the NAND gate is a standard AND gate with an inversion bubble connected.

MIL/ANSI Symbol IEC Symbol DIN Symbol

Logic[edit]

The function NAND(a1, a2, ..., an)islogically equivalenttoNOT(a1 AND a2 AND ... AND an).

One way of expressing A NAND B is , where the symbol signifies AND and the bar signifies the negation of the expression under it: in essence, simply .

Hardware design and pinout[edit]

Diagram of the NAND gates in a CMOS type 4011 integrated circuit

NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.

The standard, 4000 series, CMOS IC is the 4011, which includes four independent, two-input, NAND gates. These devices are available from many semiconductor manufacturers. These are usually available in both through-hole DIL and SOIC formats. Datasheets are readily available in most datasheet databases.

The standard two-, three-, four- and eight-input NAND gates are available:

Functional completeness[edit]

construction of a NAND gate from NOR gates

The NAND gate has the property of functional completeness, which it shares with the NOR gate. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates.[1] An entire processor can be created using NAND gates alone. In TTL ICs using multiple-emitter transistors, it also requires fewer transistors than a NOR gate.

As NOR gates are also functionally complete, if no specific NAND gates are available, one can be made from NOR gates using NOR logic.[1]

See also[edit]


References[edit]

  1. ^ a b Mano, M. Morris and Charles R. Kime. Logic and Computer Design Fundamentals, Third Edition. Prentice Hall, 2004. p. 73.

External links[edit]


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