It extended the dual-address-space mechanism introduced in later IBM System/370 models by adding a new mode in which general-purpose registers 1-15 are each associated with an access register referring to an address space, with instruction operands whose address is computed with a given general-purpose register as a base register will be in the address space referred to by the corresponding address register.
The later ESA/390, introduced in 1990, added a facility to allow device descriptions to be read using channel commands and, in later models, added instructions to perform IEEE 754 floating-point operations and increased the number of floating-point registers from 4 to 16.
Enterprise Systems Architecture is essentially a 32-bit architecture; as with System/360, System/370, and 370-XA, the general-purpose registers are 32 bits long, and the arithmetic instructions support 32-bit arithmetic. Only byte-addressable real memory (Central Storage) and Virtual Storage addressing is limited to 31 bits, as is the case with 370-XA. (IBM reserved the most significant bit to easily support applications expecting 24-bit addressing, as well as to sidestep a problem with extending two instructions to handle 32-bit unsigned addresses.) It maintains problem state backward compatibility dating back to 1964 with the 24-bit-address/32-bit-data (System/360 and System/370) and subsequent 24/31-bit-address/32-bit-data architecture (System/370-XA). However, the I/O subsystem is based on System/370 Extended Architecture (S/370-XA), not on the original S/370 I/O instructions.
On February 15, 1988, IBM announced[6][7]
Enterprise Systems Architecture/370 (ESA/370) for 3090 enhanced ("E") models and for 4381 model groups 91E and 92E.
In addition to the primary-space and secondary-space addressing modes that later System/370 models, and System/370 Extended Architecture (S/370-XA) models, support, ESA has an access register mode in which each use of general register 1-15 as a base register uses an associated access register to select an address space.[8] In addition to the normal address spaces that machines with the dual-address-space facility support, ESA also allows data spaces, which contain no executable code.
A machine may be divided into Logical Partitions (LPARs), each with its own virtual system memory so that multiple operating systems may run concurrently on one machine.
4 64-bit up to the G4; 16 64-bit starting with the G5[9][10]
An important capability to form a Parallel Sysplex was added to the architecture in 1994.
ESA/390 also extends the Sense ID command to provide additional information about a device, and additional device-dependent channel commands, the command codes for which are provided in the Sense ID information, to allow device description information to be fetched from a device.[11][12]
the basic floating-point extensions facility, which increases the number of floating-point registers from 4 (0, 2, 4, 6) to 16 (0-15);
the binary floating-point (BFP) extensions facility, which supports IEEE 754 binary floating-point numbers, with an additional floating-point control (FPC) register to support IEEE 754 modes and errors;
the floating-point support (FPS) extensions facility, which adds instructions to load and store floating-point numbers regardless of whether they're in hexadecimal or IEEE 754 format and to convert between those formats;
the hexadecimal floating-point (HFP) extensions facility, which adds new hexadecimal floating-point instructions corresponding to some binary floating-point instructions.
Some PC-based IBM-compatible mainframes which provide ESA/390 processors in smaller machines have been released over time, but are only intended for software development.
^ abSchwarz, E. M.; Krygowski, C. A. (September 1, 1999). "The S/390 G5 floating-point unit". IBM Journal of Research and Development. 43 (5): 707–721. doi:10.1147/rd.435.0707.
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