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{{Infobox programming language |
{{Infobox programming language |
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| name |
| name = Handel-C |
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| paradigm |
| paradigm = [[Imperative programming|Imperative]] ([[Procedural programming|procedural]], [[structured programming|structured]]), [[concurrent programming language|concurrent]] |
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| logo |
| logo = |
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| logo caption |
| logo caption = |
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| year |
| year = 1996 |
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| designer |
| designer = [[Oxford University Computing Laboratory]] |
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| developer |
| developer = ESL; Celoxica; Agility; Mentor Graphics; [[Siemens Digital Industries Software|Siemens EDA]] |
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| latest release version = v3.0 |
| latest release version = v3.0 |
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| latest release date |
| latest release date = |
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⚫ | | typing = [[Type system|Static]], [[manifest typing|manifest]], [[Nominative type system|nominal]], [[Type inference|inferred]] |
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| turing-complete = Yes |
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⚫ | |||
⚫ |
| typing |
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| influenced_by = [[C (programming language)|C]], [[Communicating sequential processes|CSP]], [[Occam (programming language)|occam]] |
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⚫ | |||
⚫ | |||
| influenced_by = [[C_(programming_language)|C]], [[Communicating_sequential_processes|CSP]], [[Occam_(programming_language)|occam]] |
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⚫ | |||
⚫ | |||
⚫ | | operating_system = [[Cross-platform|Cross-platform (multi-platform)]] |
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⚫ | |||
⚫ | |||
⚫ |
| operating_system |
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| website = {{URL|https://eda.sw.siemens.com/en-US/ic/precision/}} |
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⚫ | |||
| website = {{URL|http://www.mentor.com/products/fpga/handel-c/}} |
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}} |
}} |
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'''Handel-C''' is a high-level |
'''Handel-C''' is a [[High-level synthesis|high-level hardware description language]] aimed at low-level hardware and is most commonly used in programming [[FPGA]]s. Handel-C is to hardware design what the first [[High-level programming language|high-level programming languages]] were to programming [[Central processing unit|CPUs]]. It isa[[Turing completeness|turing-complete]] rich subset of the [[C (programming language)|C]] programming language, with an emphasison[[parallel computing]]. |
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Unlike many other [[Hardware description language|hardware design languages]] (HDL) that target a specific [[computer architecture]] Handel-C can be compiled to a number of HDLs and then synthesised to the corresponding hardware. This frees developers to concentrate on the programming task at hand rather than the [[Idiosyncrasy|idiosyncrasies]] of a specific design language and architecture. |
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==Additional features== |
==Additional features== |
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⚫ | Handel-C's subset of C includes all common C language features necessary to describe complex [[algorithms]]. Like many embedded C compilers, [[Floating-point arithmetic|floating point]] data types were omitted. Floating point arithmetic is supported through external [[Library (computing)|libraries]] that are very efficient. |
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⚫ |
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===Parallel programs=== |
===Parallel programs=== |
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⚫ | In order to facilitate a way to describe [[Parallel computing|parallel behavior]] some of the [[communicating sequential processes]] (CSP) keywords are used, along with the general file structure of the [[Occam programming language]]. |
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For example:<ref name="Handel-C_Manual">{{cite web |url=http://www.agilityds.com/literature/HandelC_Language_Reference_Manual.pdf |title=Archived copy |access-date=2010-03-31 |url-status=dead |archive-url=https://web.archive.org/web/20100331015609/http://www.agilityds.com/literature/HandelC_Language_Reference_Manual.pdf |archive-date=2010-03-31 }} Handel-C Language Reference Manual</ref> |
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⚫ |
In order to facilitate a way to describe [[Parallel computing|parallel |
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<syntaxhighlight lang=C> |
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For example:<ref name="Handel-C_Manual">http://www.agilityds.com/literature/HandelC_Language_Reference_Manual.pdf Handel-C Language Reference Manual</ref> |
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<source lang=C> |
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par { |
par { |
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++c; |
++c; |
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b = d + e; |
b = d + e; |
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} |
} |
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</syntaxhighlight> |
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</source> |
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===Channels=== |
===Channels=== |
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[[Channel (programming)|Channels]] provide a mechanism for [[message passing]] between [[Parallel_computing#Software|parallel threads]]. Channels can be defined as asynchronous or synchronous (with or without an inferred storage element respectively). A thread writing to a synchronous channel will be immediately [[Blocking (computing)|blocked]] until the corresponding listening thread is ready to receive the message. Likewise the receiving thread will block on a read statement until the sending thread executes the next send. Thus they may be used as a means of [[Synchronization (computer science)|synchronizing]] threads.<ref name="Handel-C_Manual" /> |
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<syntaxhighlight lang=C> |
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par { |
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chan int a; // declare a synchronous channel |
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int x; |
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// begin sending thread |
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seq (i = 0; i < 10; i++) { |
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a ! i; // send the values 0 to 9 sequentially into the channel |
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} |
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// begin receiving thread |
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seq (j = 0; j < 10; j++) { |
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a ? x; // perform a sequence of 10 reads from the channel into variable x |
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delay; // introduce a delay of 1 clock cycle between successive reads |
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// this has the effect of blocking the sending thread between writes |
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} |
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} |
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</syntaxhighlight> |
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Asynchronous channels provide a specified amount of storage for data passing through them in the form of a [[FIFO (computing and electronics)|FIFO]]. Whilst this FIFO neither full nor empty, both sending and receiving threads may proceed without being blocked. However, when the FIFO is empty, the receiving thread will block at the next read. When it is full, the sending thread will block at the next send. A channel with actors in differing [[Clock domain crossing|clock domains]] is automatically asynchronous due to the need for at least one element of storage to mitigate [[Metastability in electronics|metastability]]. |
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A thread may simultaneously wait on multiple channels, synchronous or asynchronous, acting upon the first one available given a specified order of priority or optionally executing an alternate path if none is ready. |
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Channels provide communication between parallel threads, one of the paths outputs data onto the channel and the other parallel thread can read the data. Channels can be created with or without a [[FIFO]] capability. For a channel without a [[FIFO]] the first thread to execute the channel read (or write) command waits until the corresponding write (or read) is executed in the other communicating thread. In this way the sender and receiver rendezvous and can pass a datum from one to the other and so synchronize their operation in a cooperative manner.<ref name="Handel-C_Manual" /> |
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===Scope and variable sharing=== |
===Scope and variable sharing=== |
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For example: |
For example: |
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< |
<syntaxhighlight lang=C> |
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int a; |
int a; |
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} |
} |
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} |
} |
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</syntaxhighlight> |
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</source> |
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===Extensions to the C language=== |
===Extensions to the C language=== |
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In addition to the effects the standard semantics of [[C programming language|C]] have on the timing of the program, the following keywords<ref name="Handel-C_Manual" /> are reserved for describing the practicalities of the FPGA environment or for the language elements sourced from Occam: |
In addition to the effects the standard semantics of [[C programming language|C]] have on the timing of the program, the following keywords<ref name="Handel-C_Manual" /> are reserved for describing the practicalities of the FPGA environment or for the language elements sourced from Occam: |
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{| class="wikitable" |
{| class="wikitable" style="font-family:monospace" |
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|- style="font-family:notset" |
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|- |
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! Types and Objects |
! Types and Objects |
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! Expressions |
! Expressions |
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|with |
|with |
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|- |
|- |
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|typeof |
|[[typeof]] |
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==History== |
==History== |
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The historical roots of Handel-C are in a series of [[Oxford University Computing Laboratory]] hardware description languages developed by the hardware compilation group. Handel HDL evolved into Handel-C around early 1996. The technology developed at Oxford was spun off to mature as a cornerstone product for Embedded Solutions Limited (ESL) in 1996. ESL was renamed Celoxica in September 2000. |
The historical roots of Handel-C are in a series of [[Oxford University Computing Laboratory]] hardware description languages developed by the hardware compilation group. Handel HDL evolved into Handel-C around early 1996. The technology developed at Oxford was [[Research spin-off|spun off]] to mature as a cornerstone product for Embedded Solutions Limited (ESL) in 1996. ESL was renamed Celoxica in September 2000. |
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Handel-C was adopted by many University Hardware Research groups after its release by ESL, as a result was able to establish itself as a hardware design tool of choice within the academic community, especially in the United Kingdom. |
Handel-C was adopted by many University Hardware Research groups after its release by ESL, as a result was able to establish itself as a hardware design tool of choice within the academic community, especially in the United Kingdom. |
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In early 2008, Celoxica's ESL business was acquired by Agility, which developed and sold, among other products, ESL tools supporting Handel-C. |
In early 2008, Celoxica's ESL business was acquired by Agility, which developed and sold, among other products, ESL tools supporting Handel-C. |
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In early 2009, Agility ceased operations after failing to obtain further capital investments or credit<ref>{{cite web |url= |
In early 2009, Agility ceased operations after failing to obtain further capital investments or credit<ref>{{cite web |url=https://www.eetimes.com/agility-ds-victim-of-credit-crunch/|title=Agility DS victim of credit crunch|author=Gabe Moretti|date=19 January 2009|publisher=EETimes.com}}</ref> |
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In January 2009, Mentor Graphics acquired Agility's C synthesis assets.<ref>{{cite web |url= |
In January 2009, [[Mentor Graphics]] acquired Agility's C synthesis assets.<ref>{{cite web |url=https://www.eetimes.com/mentor-buys-agilitys-c-synthesis-assets/|title=Mentor buys Agility's C synthesis assets|author= Dylan McGrath|date=22 January 2009|publisher=EETimes.com}}</ref> |
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Other subset C HDL's that developed around the same time are Transmogrifier C in 1994 at [[University of Toronto]] (now the [[FpgaC]] open source project) and Streams-C at [[Los Alamos National Laboratory]] (now licensed to [[Impulse Accelerated Technologies]] under the name [[Impulse C]]) |
Other subset C HDL's that developed around the same time are Transmogrifier C in 1994 at [[University of Toronto]] (now the [[FpgaC]] open source project) and Streams-C at [[Los Alamos National Laboratory]] (now licensed to [[Impulse Accelerated Technologies]] under the name [[Impulse C]]) |
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==See also== |
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* [[High- and low-level]] |
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* [[C to HDL]] |
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==References== |
==References== |
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{{Reflist}} |
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<references/> |
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==External links== |
==External links== |
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*[http://www.mentor.com/products/fpga/handel-c/ Handel-C language resources] at Mentor Graphics |
*[http://www.mentor.com/products/fpga/handel-c/ Handel-C language resources] at Mentor Graphics |
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*[http://www.doc.ic.ac.uk/~akf/handel-c/cgi-bin/forum.cgi Handel-C Forum] An open forum for the discussion of the Handel-C language |
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*[http://citeseer.ist.psu.edu/rd/49527001%2C78794%2C1%2C0.25%2CDownload/http://citeseer.ist.psu.edu/cache/papers/cs/3848/ftp:zSzzSzftp.comlab.ox.ac.ukzSzpubzSzDocumentszSztechpaperszSzIan.PagezSzumist.pdf/page96hardwaresoftware.pdf Oxford Handel-C] |
*[http://citeseer.ist.psu.edu/rd/49527001%2C78794%2C1%2C0.25%2CDownload/http://citeseer.ist.psu.edu/cache/papers/cs/3848/ftp:zSzzSzftp.comlab.ox.ac.ukzSzpubzSzDocumentszSztechpaperszSzIan.PagezSzumist.pdf/page96hardwaresoftware.pdf Oxford Handel-C] |
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* {{Cite book|author1=Ahmed Ablak |author2=Issam Damaj |author3=American University of Kuwait |title=2016 Euromicro Conference on Digital System Design (DSD) |chapter=HTCC: Haskell to Handel-C Hardware Compiler |year=2016 |pages=192–199|doi=10.1109/DSD.2016.24 |arxiv=1907.07764 |isbn=978-1-5090-2817-7 |s2cid=13213191 }} |
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*[http://www.agilityds.com/literature/HandelC_Language_Reference_Manual.pdf Handel-C Language Reference Manual] From Agility Design Solutions |
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{{Programmable Logic}} |
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{{Authority control}} |
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[[Category:C programming language family]] |
[[Category:C programming language family]] |
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[[Category:Hardware description languages]] |
[[Category:Hardware description languages]] |
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[[Category:Electronic design automation]] |
Paradigm | Imperative (procedural, structured), concurrent |
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Designed by | Oxford University Computing Laboratory |
Developer | ESL; Celoxica; Agility; Mentor Graphics; Siemens EDA |
First appeared | 1996 |
Stable release | v3.0 |
Typing discipline | Static, manifest, nominal, inferred |
OS | Cross-platform (multi-platform) |
Filename extensions | .hcc, .hch |
Website | eda |
Major implementations | |
Celoxica DK | |
Influenced by | |
C, CSP, occam |
Handel-C is a high-level hardware description language aimed at low-level hardware and is most commonly used in programming FPGAs. Handel-C is to hardware design what the first high-level programming languages were to programming CPUs. It is a turing-complete rich subset of the C programming language, with an emphasis on parallel computing.
Unlike many other hardware design languages (HDL) that target a specific computer architecture Handel-C can be compiled to a number of HDLs and then synthesised to the corresponding hardware. This frees developers to concentrate on the programming task at hand rather than the idiosyncrasies of a specific design language and architecture.
Handel-C's subset of C includes all common C language features necessary to describe complex algorithms. Like many embedded C compilers, floating point data types were omitted. Floating point arithmetic is supported through external libraries that are very efficient.
In order to facilitate a way to describe parallel behavior some of the communicating sequential processes (CSP) keywords are used, along with the general file structure of the Occam programming language.
For example:[1]
par {
++c;
a = d + e;
b = d + e;
}
Channels provide a mechanism for message passing between parallel threads. Channels can be defined as asynchronous or synchronous (with or without an inferred storage element respectively). A thread writing to a synchronous channel will be immediately blocked until the corresponding listening thread is ready to receive the message. Likewise the receiving thread will block on a read statement until the sending thread executes the next send. Thus they may be used as a means of synchronizing threads.[1]
par {
chan int a; // declare a synchronous channel
int x;
// begin sending thread
seq (i = 0; i < 10; i++) {
a ! i; // send the values 0 to 9 sequentially into the channel
}
// begin receiving thread
seq (j = 0; j < 10; j++) {
a ? x; // perform a sequence of 10 reads from the channel into variable x
delay; // introduce a delay of 1 clock cycle between successive reads
// this has the effect of blocking the sending thread between writes
}
}
Asynchronous channels provide a specified amount of storage for data passing through them in the form of a FIFO. Whilst this FIFO neither full nor empty, both sending and receiving threads may proceed without being blocked. However, when the FIFO is empty, the receiving thread will block at the next read. When it is full, the sending thread will block at the next send. A channel with actors in differing clock domains is automatically asynchronous due to the need for at least one element of storage to mitigate metastability.
A thread may simultaneously wait on multiple channels, synchronous or asynchronous, acting upon the first one available given a specified order of priority or optionally executing an alternate path if none is ready.
The scope of declarations are limited to the code blocks ({ ... }
) in which they were declared, the scope is hierarchical in nature as declarations are in scope within sub blocks.[1]
For example:
int a;
void main(void)
{
int b;
/* "a" and "b" are within scope */
{
int c;
/* "a", "b" and "c" are within scope */
}
{
int d;
/* "a", "b" and "d" are within scope */
}
}
In addition to the effects the standard semantics of C have on the timing of the program, the following keywords[1] are reserved for describing the practicalities of the FPGA environment or for the language elements sourced from Occam:
Types and Objects | Expressions | Statements |
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chan | < ... > (type clarifier) | ! (send into channel) |
chanin | [ : ] (bit range selection) | ? (read from channel) |
chanout | \\ (drop) | delay |
macro expr | <- (take) | ifselect |
external | @ (concatenation operator) | set intwidth |
external_divide | select | let ... ; in |
inline | width | par |
interface | prialt | |
internal | releasesema | |
internal_divide | set clock | |
mpram | set family | |
macro proc | set part | |
ram | set reset | |
rom | seq | |
sema | try { ... } reset | |
shared | trysema | |
signal | with | |
typeof | ||
undefined | ||
wom |
In Handel-C, assignment and the delay command take one cycle. All other operations are "free".[1] This allows programmers to manually schedule tasks and create effective pipelines. By arranging loops in parallel with the correct delays, pipelines can massively increase data throughput, at the expense of increased hardware resource use.
The historical roots of Handel-C are in a series of Oxford University Computing Laboratory hardware description languages developed by the hardware compilation group. Handel HDL evolved into Handel-C around early 1996. The technology developed at Oxford was spun off to mature as a cornerstone product for Embedded Solutions Limited (ESL) in 1996. ESL was renamed Celoxica in September 2000.
Handel-C was adopted by many University Hardware Research groups after its release by ESL, as a result was able to establish itself as a hardware design tool of choice within the academic community, especially in the United Kingdom.
In early 2008, Celoxica's ESL business was acquired by Agility, which developed and sold, among other products, ESL tools supporting Handel-C.
In early 2009, Agility ceased operations after failing to obtain further capital investments or credit[2]
In January 2009, Mentor Graphics acquired Agility's C synthesis assets.[3]
Other subset C HDL's that developed around the same time are Transmogrifier C in 1994 at University of Toronto (now the FpgaC open source project) and Streams-C at Los Alamos National Laboratory (now licensed to Impulse Accelerated Technologies under the name Impulse C)
{{cite web}}
: CS1 maint: archived copy as title (link) Handel-C Language Reference Manual
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