Jump to content
 







Main menu
   


Navigation  



Main page
Contents
Current events
Random article
About Wikipedia
Contact us
Donate
 




Contribute  



Help
Learn to edit
Community portal
Recent changes
Upload file
 








Search  

































Create account

Log in
 









Create account
 Log in
 




Pages for logged out editors learn more  



Contributions
Talk
 



















Contents

   



(Top)
 


1 History  





2 Details  





3 As an audio interconnect  





4 See also  





5 References  





6 External links  














I²S






Català
Čeština
Deutsch
Español
Français

Italiano

Polski
Русский

 

Edit links
 









Article
Talk
 

















Read
Edit
View history
 








Tools
   


Actions  



Read
Edit
View history
 




General  



What links here
Related changes
Upload file
Special pages
Permanent link
Page information
Cite this page
Get shortened URL
Download QR code
Wikidata item
 




Print/export  



Download as PDF
Printable version
 




In other projects  



Wikimedia Commons
 
















Appearance
   

 






From Wikipedia, the free encyclopedia
 


I²S bus
Type Serial communication bus
Production history
Designer Philips Semiconductor, known today as NXP Semiconductors
Designed 1986; 38 years ago (1986)
Data
Data signal Push-pull
Width 1 data line (SD) +
2 clock lines (SCK, WS)
Protocol Serial

I²S (Inter-IC Sound, pronounced "eye-squared-ess"[citation needed]), is an electrical serial bus interface standard used for connecting digital audio devices together. It is used to communicate PCM audio data between integrated circuits in an electronic device. The I²S bus separates clock and serial data signals, resulting in simpler receivers than those required for asynchronous communications systems that need to recover the clock from the data stream. Alternatively I²S is spelled I2S (pronounced eye-two-ess) or IIS (pronounced eye-eye-ess). Despite the similar name, I²S is unrelated to the bidirectional I²C (IIC) bus.

History[edit]

This standard was introduced in 1986 by Philips Semiconductor (now NXP Semiconductors) and was first revised June 5, 1996.[1] The standard was last revised on February 17, 2022 and updated terms master and slavetocontroller and target.[2]

Details[edit]

Timing diagram of I²S

The I²S protocol outlines one specific type of PCM digital audio communication with defined parameters outlined in the Philips specification.

The bus consists of at least three lines:

  1. Bit clock line
    • Officially "continuous serial clock (SCK)".[1] Typically written "bit clock (BCLK)".[3]
  2. Word clock line
    • Officially "word select (WS)".[1] Typically called "left-right clock (LRCLK)"[3] or "frame sync (FS)".[4]
    • 0 = Left channel, 1 = Right channel[1]
  3. At least one multiplexed data line
    • Officially "serial data (SD)",[1] but can be called SDATA, SDIN, SDOUT, DACDAT, ADCDAT, etc.[3]

It may also include the following lines:

  1. Master clock (typically 256 x LRCLK)
    • This is not part of the I2S standard,[5] but is commonly included for synchronizing the internal operation of the analog/digital converters.[4][6]
  2. A multiplexed data line for upload

The bit clock pulses once for each discrete bit of data on the data lines. The bit clock frequency is the product of the sample rate, the number of bits per channel and the number of channels. So, for example, CD Audio with a sample frequency of 44.1 kHz, with 16 bits of precision and two channels (stereo) has a bit clock frequency of:

44.1 kHz × 16 × 2 = 1.4112 MHz

The word select clock lets the device know whether channel 1 (WS = 0) or channel 2 (WS = 1) is currently being sent, because I²S allows two channels to be sent on the same data line. It is a 50% duty-cycle signal that has the same frequency as the sample frequency. For stereo material, the I²S specification states that left audio is transmitted on the low cycle of the word select clock and the right channel is transmitted on the high cycle. It is typically synchronized to the falling edge of the serial clock, as the data is latched on the rising edge.[1] The word select clock changes one bit clock period before the MSB is transmitted. This enables, for example, the receiver to store the previous word and clear the input for the next.[1]

Data is signed, encoded as two's complement with the MSB (most significant bit) first.[1] This allows the number of bits per frame to be arbitrary, with no negotiation required between transmitter and receiver.[1]

As an audio interconnect[edit]

In audio equipment, I²S is sometimes used as an external link between a CD player or digital audio streaming device and an external digital-to-analog converter, as opposed to a purely internal connection within one player box. This may form an alternative to the commonly used AES/EBU, ToslinkorS/PDIF standards.

The I²S connection was not intended to be used via cables, and most integrated circuits will not have the correct impedance for coaxial cables. As the impedance adaptation error associated with the different line lengths can cause differences in propagation delay between the clock line and data line, this can result in synchronization problems between the SCK, WS and data signals, mainly at high sampling frequencies and bitrates. As the I²S bus doesn't have any error detection mechanism, this can cause significant decoding errors.

There is no standard interconnecting cable for this application. Some manufacturers simply provide three BNC connectors, an 8P8C ("RJ45") socket or a DE-9 connector. Others like Audio Alchemy (now defunct) used DIN connectors. PS Audio, Musica Pristina and Wyred4Sound use an HDMI connector.[7] Dutch manufacturer Van Medevoort has implemented Q-link in some of its equipment, which transfers I²S over 4 RCA connectors (data, MCK, LRCK, BCK).

See also[edit]

References[edit]

  1. ^ a b c d e f g h i "I²S Specification" (PDF). Philips Semiconductors. June 5, 1996. Archived from the original (PDF) on January 2, 2007.
  • ^ "UM11732 I2S bus specification" (PDF). NXP. Retrieved 19 March 2022.
  • ^ a b c Lewis, Jerad (January 2012). "Technical Article MS-2275: Common Inter-IC Digital Interfaces for Audio Data Transfer" (PDF). Analog Devices, Inc.
  • ^ a b "MCLK in I2S audio protocol". electronics.stackexchange.com. Retrieved 2016-11-04. Clock source for the delta-sigma modulators and digital filters. ... It is the clock that is used by the audio codec ... to time and/or drive its own internal operation.
  • ^ "PCM1781 (or any I2S DAC) clock sources - Audio Converters Forum - Audio Converters - TI E2E Community". e2e.ti.com. Retrieved 2016-11-04. True, the master (modulator) clock is not part of the I2S standard
  • ^ Arbona, Jorge (September 2010). "Application Report SLAA469 Audio Serial Interface Configurations for Audio Codecs" (PDF). Audio converters based on the delta-sigma (ΔΣ) architecture require an internal master clock that operates at a much faster rate than the target sample rate.
  • ^ McGowan, Paul (2010-04-02). "I2S standards from PS Audio". diyAudio. Retrieved 2022-09-11.
  • External links[edit]


    Retrieved from "https://en.wikipedia.org/w/index.php?title=I²S&oldid=1219104733"

    Categories: 
    Audio communications protocols
    NXP Semiconductors
    Serial buses
    Hidden categories: 
    Articles with short description
    Short description matches Wikidata
    All articles with unsourced statements
    Articles with unsourced statements from July 2023
    Articles needing additional references from October 2022
    All articles needing additional references
     



    This page was last edited on 15 April 2024, at 19:37 (UTC).

    Text is available under the Creative Commons Attribution-ShareAlike License 4.0; additional terms may apply. By using this site, you agree to the Terms of Use and Privacy Policy. Wikipedia® is a registered trademark of the Wikimedia Foundation, Inc., a non-profit organization.



    Privacy policy

    About Wikipedia

    Disclaimers

    Contact Wikipedia

    Code of Conduct

    Developers

    Statistics

    Cookie statement

    Mobile view



    Wikimedia Foundation
    Powered by MediaWiki