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| VAX Bus Interconnect bus | |
| Year created | ~1986; 38 years ago (1986) |
|---|---|
| Created by | Digital Equipment Corporation |
| Width in bits | 32 |
The VAXBI bus (VAX BusInterconnect bus) is a computer bus designed and sold by the Digital Equipment Corporation (DEC) of Maynard, Massachusetts.[1]
The bus is an advanced, configuration-free synchronous bus used on DEC's later VAX computers. Like the Unibus and Q-Bus before it, it uses memory-mapped I/O but has 32-bit address and data paths. The VAXBI is a multiplexed bus with fully distributed arbitration and geographic addressing.
All of the logic required to implement a VAXBI interface is contained within a single custom integrated circuit (the "BIIC") and the physical layout and printed wiring board layout for compliant cards is tightly specified, right down to the location of the dual amber status LEDs that are required. The portion of the card that is reserved for the bus interface is referred to as "the VAXBI corner".[2] VAXBI licensees were given the appropriate engineering drawings to allow them to exactly replicate a compliant card.
VAXBI cards mount into backplanes usinExpansion cardcardg a ZIF connector; depending on the backplane design, cards can be loaded from the top or the front side of the backplane. No cable connections are permitted on the cards; all connections are made via three uncommitted rows of backplane connectors. Similarly, no configuration jumpers are permitted on the cards; all setup is done by jumpers inserted on the backplane connectors or via software configuration.
Originally conceived by its engineers to be an open bus, it was forced to be a tightly licensed bus by Digital's marketing and management, and was not nearly as successful as had originally been hoped-for.
It is used in the VAX 6000, VAX 8000 (82xx, 83xx, 85xx, 87xx, 88xx models) and the VAX 9000 systems and also on the MIPS R3000 based DECsystem 5800 series.
APDP-11 implementation (the PDP-11/27) was envisioned but never advanced beyond the concept stage.
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Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. | |
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