MCST develops the Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of INEUM [ru].
The name "Elbrus" has been given the backronym "ExpLicit Basic Resources Utilization Scheduling".[5]
Elbrus 1 (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and ALGOL as system language like the Burroughs large systems. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with faster ECL chips.
Elbrus 3 (1986) was a 16-processor computer developed by Boris Babayan. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a VLIW architecture.
Elbrus-3M1 (2005) is a two-processor computer based on the Elbrus 2000 microprocessor employing VLIW architecture working at 300 MHz. It is a further development of the Elbrus 3 (1986).
Elbrus-2S+ (2011) is a dual-core Elbrus 2000 based microprocessor working at 500 MHz, with capacity to calculate 16 GFlops.
Elbrus-2SM (2014) is a dual-core Elbrus 2000 based microprocessor working at 300 MHz, with capacity to calculate 9.6 GFlops.
Elbrus-4S (2014) is a quad-core Elbrus 2000 based microprocessor working at 800 MHz, with capacity to calculate 50 GFlops.
Elbrus-8S (2014–2015) is an octa-core Elbrus 2000 based microprocessor working at 1300 MHz, with capacity to calculate 250 GFlops.
Elbrus-8SV (2018) is an octa-core Elbrus 2000 based microprocessor working at 1500 MHz, with capacity to calculate 576 GFlops.
Elbrus-16S (2021) is 16-core Elbrus 2000 based microprocessor working at 2000 MHz, with capacity to calculate 750 GFlops at double precision and 1.5 TFlops at single precision operations.
Elbrus-32S (Sample production is planned in 2025) is a 32-core Elbrus 2000 based microprocessor working at 2500 MHz, with capacity to calculate 1.5 TFlops.[6]
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